Recent developments and challenges in FPGA-Based time-to-digital converters

Abstract

Over the past few years, the gap between field-programmable gate array (FPGA) and application-specific integrated circuit (ASIC) performance levels has been narrowed due to the constant development of FPGA technology. The high performance, together with the lower development costs and a shorter time to market, turns FPGA-based platforms attractive for a huge range of applications, among them time-To-digital converters (TDCs). It is, therefore, important to analyze the evolution of FPGA-based TDCs to better understand where the research efforts should be focused in the near future. This article presents and discusses the improvements on the FPGA-based TDC research, aiming to be a starting point for new studies on this field, with some guidelines for future research. A state-of-The-Art literature review on the FPGA-based TDC is presented, aiming to categorize and discuss the existing architectures. This discussion addresses architectures' characteristics, limitations, and areas of application.