Utilize este identificador para referenciar este registo:
https://hdl.handle.net/1822/71347
Título: | Non-intrusive hardware acceleration for dynamic binary translation in embedded systems |
Autor(es): | Gomes, Tiago Manuel Ribeiro Salgado, Filipe Alexandre Andrade Cabral, Jorge Tavares, Adriano Monteiro, João L. |
Palavras-chave: | Computer architectures Dynamic binary translation (DBT) Dynamic compilation Embedded systems Instruction-set architecture (ISA) Peripheral emulation |
Data: | 2019 |
Editora: | Institute of Electrical and Electronics Engineers |
Revista: | Proceedings of the IEEE International Conference on Industrial Technology |
Resumo(s): | This article describes a non-intrusive hardware acceleration approach for Dynamic Binary Translation (DBT) in modern resource-constrained embedded systems, detailing its motivation, design decisions and overall architecture. It was deployed and tested on DBTOR, an in-house DBT system that targets constrained embedded systems. The performed evaluations demonstrate the feasibility of the proposed method in handling condition code (CC) flags, peripheral remapping and interrupt support, by running legacy MCS-51 code on a modern Arm v7-M architecture (Cortex-M3) that resorts field-programmable gate array (FPGA) technology for acceleration purposes. |
Tipo: | Artigo em ata de conferência |
URI: | https://hdl.handle.net/1822/71347 |
ISBN: | 9781538663769 |
e-ISBN: | 978-1-5386-6376-9 |
DOI: | 10.1109/ICIT.2019.8755054 |
ISSN: | 2643-2978 |
Versão da editora: | https://ieeexplore.ieee.org/document/8755054 |
Arbitragem científica: | yes |
Acesso: | Acesso restrito UMinho |
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Ficheiros deste registo:
Ficheiro | Descrição | Tamanho | Formato | |
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TGomes_08755054.pdf Acesso restrito! | 242,14 kB | Adobe PDF | Ver/Abrir |